Single channel pipelined variable-length FFT processor design

Variable-length FFT Processor Architecture

In this paper, we proposed an variable length FFT processor architecture which could be used in multi-mode and multi-standard OFDM communication system. Based on radix-2 single-path delay feedback architecture, FFT is implemented with the aid of LUT and control logic. The expected architecture would complete FFT ranging 2048/1024/512point. Keywords-FFT; Radix-2 FFT; variable length FFT;

High Performance Pipelined Design for FFT Processor based on FPGA

It is important to develop a high-performance FFT processor to meet the requirements of real time and low cost in many different systems. So a radix-2 pipelined FFT processor based on Field Programmable Gate Array (FPGA) for Wireless Local Area Networks (WLAN) is proposed. Unlike being stored in the traditional ROM, the twiddle factors in our pipelined FFT processor can be accessed directly. Th...

Design and Implementation of Variable Length FFT Processor for OFDMA System Using FPGA

For Orthogonal Frequency Division Multiple Access (OFDMA) system module, there is a need for an efficient alterable point FFT processor. Therefore, it is meaningful to design a FFT processor for which input data points could be alterable. In this paper the variable input FFT processor is designed to meet the requirements of OFDMA system. For this, in this paper we select the 2D Fourier transfor...

VLSI Design of a Variable-Length FFT/IFFT Processor for OFDM-Based Communication Systems

The technique of orthogonal frequency divisionmultiplexing (OFDM) is famous for its robustness against frequency-selective fading channel. This technique has been widely used in many wired and wireless communication systems. In general, the fast Fourier transform (FFT) and inverse FFT (IFFT) operations are used as the modulation/demodulation kernel in the OFDM systems, and the sizes of FFT/IFFT...

Design of Fft Processor